1. Field of the Invention
This application relates generally to the deposition of silicon-containing materials in semiconductor processing. More particularly, this application relates to the selective deposition of silicon-containing films using trisilane.
2. Description of the Related Art
A variety of methods are used in the semiconductor manufacturing industry to deposit materials onto surfaces. For example, one of the most widely used methods is chemical vapor deposition (“CVD”), in which atoms or molecules contained in a vapor deposit on a surface and build up to form a film. Deposition of silicon-containing (“Si-containing”) materials using conventional silicon sources and deposition methods is believed to proceed in several distinct stages, see Peter Van Zant, “Microchip Fabrication,” 4th Ed., McGraw Hill, New York, (2000), pp. 364-365. Nucleation, the first stage, is very important and is greatly affected by the nature and quality of the substrate surface. Nucleation occurs as the first few atoms or molecules deposit onto the surface and form nuclei. During the second stage, the isolated nuclei form small islands that grow into larger islands. In the third stage, the growing islands begin coalescing into a continuous film. At this point, the film typically has a thickness of a few hundred angstroms and is known as a “transition” film. It generally has chemical and physical properties that are different from the thicker bulk film that begins to grow after the transition film is formed.
While trisilane has been long been known as a theoretical precursor for silicon, few studies have been performed on it and few advantages have been recognized. Accordingly, significant commercial sources of trisilane have not developed historically. Recently, however, a variety of advantages for trisilane have been discovered. U.S. Pat. No. 6,821,825, issued Nov. 23, 2004, for example, discloses superior film uniformity deposited from trisilane. U.S. Pat. No. 6,900,115, issued May 31, 2005, similarly discloses uniformity and throughput benefits from use of trisilane when simultaneously depositing over mixed substrates such as mixed semiconductor and insulating surfaces.
As disclosed in both of the above-referenced patents, it is often desirable to achieve uniform deposition over both insulating (e.g., silicon oxide) and semiconductor (e.g., silicon) surfaces. On the other hand, in other contexts it is desirable to deposit selectively within semiconductor windows exposed within fields of different materials, such as field isolation oxide. For example, heterojunction bipolar transistors are often fabricated using selective deposition techniques that deposit epitaxial (single-crystal) semiconductor films only on active areas. Other transistor designs benefit from elevated source/drain structures, which provide additional silicon that can be consumed by the source/drain contact process without altering shallow junction device performance. Selective epitaxy on source/drain regions advantageously reduces the need for subsequent patterning and etch steps.
Generally speaking, selectivity takes advantage of differential nucleation during deposition on disparate materials. Selective deposition can generally be explained by simultaneous etching and deposition of the material being deposited. The precursor of choice will generally have a tendency to nucleate and grow more rapidly on one surface and less rapidly on another surface. For example, silane will generally nucleate on both silicon oxide and silicon, but there is a longer nucleation phase on silicon oxide. At the beginning of a nucleation stage, discontinuous films on oxide have a high exposed surface area relative to merged, continuous films on silicon. Accordingly, an etchant added to the process will have a greater effect upon the poorly nucleating film on the oxide as compared to the rapidly nucleating film on the silicon. The relative selectivity of a process can thus be tuned by adjusting factors that affect the deposition rate (e.g., precursor flow rates, temperature, pressure) and the rate of etching (e.g., etchant flow rate, temperature, pressure). Changes in each variable will generally have different effects upon etch rate and deposition rate. Typically, a selective deposition process is tuned to produce the highest deposition rate feasible on the window of interest while accomplishing no deposition in the field regions. Known selective silicon deposition processes include reactants silane and hydrochloric acid with a hydrogen carrier gas.
While selective deposition processes are known in the art, continued scaling in pursuit of faster, less power-hungry circuitry has increased the demands on integrated circuit fabrication. Accordingly, selective deposition processes with improved uniformity, purity, deposition speed and repeatability are desired.